Physics Checklist for Editing the Film

These are the scientific constraints of the explanation. They guide source and visual review; the checklist is not certification of a fabricated device or completed independent scientific validation. Read the scientific scope before changing the comparison.

Check	Required interpretation	What to inspect
Electron supply	Electrons arrive from semiconductor/contact regions, not through the gate dielectric in the ideal field-effect picture	Particle paths and dielectric label
Depletion and inversion	In the p-type MOSFET reference, holes recede near the surface and an electron inversion layer develops above threshold	Carrier distribution and timing
Current direction	For the illustrated n-channel bias, electrons move S → D and conventional current points D → S	Arrows, labels and particles
Two electrical roles	The gate controls carrier distribution; source–drain bias drives lateral transport	Keep vertical and horizontal cues distinct
EDL charge signs	Anions near the positive gate; cations on the electrolyte side near the semiconductor; electrons across that interface	Legend, signs and locations
Both interfaces	Gate–electrolyte and semiconductor–electrolyte charge layers contribute; the bulk is approximately neutral	Macro distribution and potential profile
Effective distance	The EDL separation is not the full electrolyte thickness	Brackets, scale cues and text
Comparison quantity	Both drawings reach the same target charge change, not equal measured current or all equal properties	Shared charge parameter and voltage indicators
Capacitance relation	ΔQ ≈ C_eff ΔV_eff is a qualified capacitive relation	Do not treat it as a full nonlinear device solution
Numerical examples	The 100-fold example and bar heights are schematic, not measured or scale-faithful	Keep illustrative labels
Breakdown image	Defects and a connected path illustrate one gate-related failure idea	Do not add predicted lifetime, probability or threshold
Local field	Low external voltage does not imply weak local EDL field	Retain the limitation
Material strength	EDL formation does not inherently raise intrinsic breakdown strength	Avoid stronger-material or failure-proof wording
Electrochemistry	Finite stability regime; redox, leakage and ion insertion are separate concerns	Retain stability-window qualification
Lateral failure	Efficient gating does not eliminate source–drain high-field or heating problems	Preserve scope of the conclusion
Geometry	Particles, cutaways, grid and dimensions serve explanation	Do not call them measurements or solved ion dynamics

Retain the conditional conclusion: a higher effective gate capacitance can reduce the gate voltage required for a given charge-control task and may reduce risks associated with reliance on high gate voltage.

When altering subtitles, regenerate the timing map and inspect the limitations as well as the main comparison. A correct source label is insufficient if it disappears too quickly to read in the film.