Storyboard and Timing

v5: approximately 146.0508 s in the authored timeline. The supplied film used a 146.1 s render interval, giving 4,383 frames at 30 fps. A render ending at the exact authored duration can differ by a frame; see rendering instructions.

The first column is the internal story coordinate, not a playback timestamp. Caption-reading intervals map 0–102 story seconds to 0–146.0508 film seconds. Viewing times are rounded navigation aids from the supplied timeline, not edit points guaranteed to remain fixed after changing text.

Viewing outline

Story coordinate Approximate viewing time Explanatory beat What carries forward
0–17 s 0:00–0:26 Draw the cross-section; apply gate bias; establish the channel; distinguish electron motion and conventional current Channel and gate/channel charge relationship
17–28.4 s 0:26–0:44 Introduce capacitance and the same-charge/lower-voltage relation; let the cross-section gain depth The device and dielectric region
28.4–44 s 0:44–1:08 Introduce electrolyte ions, rearrangement at two interfaces and the potential profile The lower interface
44–60.4 s 1:08–1:28 Enter the interface; reveal ionic/electronic charge layers and effective separation The two charge layers
60.4–78 s 1:28–1:49 Pull out; compare two devices at the same target channel-charge change The voltage contrast
78–89.8 s 1:49–2:06 Illustrate solid-dielectric field stress and a schematic breakdown path The qualified risk comparison
89.8–96.4 s 2:06–2:20 State limits: local fields, material strength, electrochemistry and lateral failure The full-device context
96.4–102 s 2:20–2:26 Return to the flat cross-section and summarize the causal chain The opening view

Story-coordinate anchors

Story position Visual action Physical meaning
0–4 Reveal substrate, source, drain, dielectric and gate Establish components before they move
4–10 Gate charge and field appear; holes recede; electrons gather Gate control changes carrier distribution
Around 10 Channel continuity receives a visual/sound accent The illustrated threshold crossing
11.5–17 Electron drift and a separate current arrow Distinguish vertical gate control and lateral transport
17–22 Charge layers and capacitor labels emerge from the structure Link the device to the capacitance picture
22–28 Extrusion, rotation and widening perspective Preserve the object as the view becomes spatial
28–34 Electrolyte replaces the dielectric illustration Introduce ions without implying a literal fabrication step
34–44 Anions gather near the gate, cations near the semiconductor; electrons accumulate across the interface Interfacial redistribution and near-neutral bulk
44–50 Camera dives; macro and magnified representations overlap briefly Change scale without losing the interface
50–60 Charge layers, effective distance and field cues remain visible Inspect why interfacial capacitance can be large
60–66 Pull out and introduce the conventional reference Prepare a common comparison
66–78 Both channels follow the same charge parameter; voltage columns differ Compare common target charge, not common voltage
78–88 Increase solid-dielectric stress; show defects and a path Illustrate a possible gate-related failure
88–96.4 Limitations remain on screen as the camera relaxes Prevent an absolute reliability claim
96.4–102 Flatten the device and present the causal chain Close in the original visual language

What changed in v5

See production notes for review context and scientific scope for the limits of the imagery.